Published in Military Embedded Systems
Written by Denis Smetana
For rugged DSP (digital signal processing) processor cards, it is important to have a balance between processor performance, memory bandwidth, I/O bandwidth, and ruggedization. Deficiencies in any of these attributes will limit the achievable performance. Due to limited real estate available on 3U OpenVPX boards, designers and users must make tradeoffs on which dimensions to maximize and/or minimize.
Processing requirements for DSP algorithms vary from case to case, but in general, the SWaP [size, weight, and power] should be maximized for a given card within its typical operating constraints. Excess capability just sitting there doesn’t gain the user anything. You don’t put a BOSS 302 engine in a Ford Pinto! Likewise, the performance of the processor must be balanced with the environment it’s in and the I/O bandwidth it can support.
The DSP system designer must ascertain how much processor performance is needed for their application: Is multithreaded or single-threaded performance more important? How many GFLOPS or MIPS are needed? How much memory bandwidth will the processor need? Is memory bandwidth or memory capacity more important? How much I/O bandwidth is needed?
When evaluating DSP applications, both the processing portion and the amount of data being ingested or generated must be considered. Memory bandwidth requirements, which can vary greatly from application to application, becomes critical when blocks of data cannot be fully processed in internal cache. Intel server-class products have had more than two memory banks to support the higher core counts; Intel brought this same capability to the embedded world with the Ice Lake D processor to ensure that memory bandwidth is available to support the multiple cores that run at higher data rates. The extra memory banks can provide 50% to 100% more memory bandwidth, which is key to fully utilizing the processor cores.