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CSfC Series: Data-at-Rest Capability Package 4.8
White Paper

CSfC Series: Data-at-Rest Capability Package 4.8

The CSfC data-at-rest (DAR) capability package has evolved over the last five to six years. Starting with the initial draft version 0.8 in July 2014, the DAR CP has matured as expected with the ever-increasing CSfC-based storage applications in the field.

05/06/2020
Choosing the Best Location for Your Data-At-Rest Encryption Technology
White Paper

Choosing the Best Location for Your Data-At-Rest Encryption Technology

The choice of encryption location can determine how difficult it is for adversaries to decrypt sensitive data and use it to their advantage.

11/20/2019
Utilizing Flexible FDR Architectures to Meet Upcoming Regulations
White Paper

Utilizing Flexible FDR Architectures to Meet Upcoming Regulations

This white paper discusses the details of the requirements for an FDR, how they can be built and how Wi-Fi-enabled aircraft can be used to stream FDR data.

03/14/2019
Using Software Full Disk Encryption and Disk Partitioning to Protect and Isolate Network Attached Storage Functions
White Paper

Using Software Full Disk Encryption and Disk Partitioning to Protect and Isolate Network Attached Storage Functions

Through disk partitioning and commercial off-the-shelf (COTS) data-at-rest (DAR) encryption, this paper proposes a solution that reduces the risk of data loss, corruption, and accessibility if intercepted.

02/26/2019
A Matter of Trust: Reducing Program Risk with Dependable Solutions
White Paper

A Matter of Trust: Reducing Program Risk with Dependable Solutions

Tactical advantage on the battlefield of the future will be based on trust and personnel will need a higher level of trust that all systems will work as needed in any situation.

10/23/2018
Why is it so Difficult to Design a Flight Recorder?
White Paper

Why is it so Difficult to Design a Flight Recorder

This white paper details the requirements for an FDR, how they are built, and what options third parties have for streamlining their own FDR developments.

10/23/2018
Mitigating Flight Data Recorder Modification Issues using Modular FDAUs
White Paper

Mitigating Flight Data Recorder Modification Issues using Modular FDAUs

This white paper discusses different strategies for gathering data for flight data recorders and the implications these have on deployment time, system flexibility, and suitability for deployment across a fleet of diverse aircraft.

07/06/2018
History and Future of Flight Data Recorder Regulations
White Paper

History and Future of Flight Data Recorder Regulations

This white paper looks at the history of Flight Data Recorders, their regulations, how these regulations are formulated, and what the future may bring.

06/20/2018
Using Aircraft Crash Protected Recorders in Missile Test Applications
White Paper

Using Aircraft Crash Protected Recorders in Missile Test Applications

This white paper discusses how readily available flight data recording devices can be combined with rugged data acquisition and transmission systems for missile test applications.

05/30/2018
Understand the FMC Standard and Get the Result You Want
White Paper

Understand the FMC Standard and Get the Result You Want

Parallels can be drawn with the FMC format: it’s a mix and match format, but creating a successful overall solution requires the selection of the right pieces, knowing their details, and how to put them together.

10/23/2015
FMC to FMC+: Keeping Up with New FPGAs and Analog I/O
White Paper

FMC to FMC+: Keeping Up with New FPGAs and Analog I/O

As FPGAs get faster and have more I/O channels with higher resolution and larger sampling rates, is the FMC standard able to cope? If is able to adapt for the future? Download the free white paper.

09/14/2015
White Paper

How Does the FMC (FPGA Mezzanine Card) Standard Measure up Against the PMC/XMC Format White Paper

Interest in reconfigurable embedded computing in the defense and aerospace market has grown significantly as new generations of FPGAs present developers with a level of processing performance and potential I/O bandwidth that cannot easily be matched by conventional CPU configurations.

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