MSDD-101-1

The MSDD-101 serial data delay module is for use in Curtiss-Wright’s MnACQ miniature data acquisition units. The MSDD-101 accepts one channel of RS-422 clock and data, delays it for a specified time, and retransmits the delayed data with clock, via RS-422.

The data can be received up to 20 Mbps and the re-transmitted clock and data are at the same rate as the input. A 50 Mbit FIFO allows for a delay of up to 2.5 sec at 20 Mbps – longer delays are possible at slower bit rates. The MSDD-101 can be configured to latch the data on either the rising edge or falling edge of the clock. The inputs can be configured to be terminated with or without 120 Ohms.