Showing 49 - 60 of 61
Optimizing Performance in OpenVPX Architectures With Intel Xeon Processors
OpenVPX (VITA 65) has made the VPX architecture a preferred option for modules and subsystems engineered for defense industry applications. In this white paper, we look at how to optimize performance in OpenVPX architectures with Intel Xeon processors.
01/03/2018
Simplifying Sensor Data Processing With Advanced GPGPU Technology and COTS Building Blocks
This white paper looks at how standards-based, pre-integrated, and prevalidated Commercial-Off-The-Shelf (COTS) building blocks can reduce program risk, expedite development-to-deployment, and create quality, affordable High-Performance Embedded Computing
12/20/2017
Interoperability Considerations Between Different Host FMC and FMC Mezzanine Vendors White Paper
In the same way as one might strip out unnecessary weight in a car aimed for racing, the FMC is a performance solution that strips away unnecessary generic interfaces for direct FPGA driven I/O. But that requires knowledge to achieve the desired performance and to ensure the host and FMC module will work well together. This paper outlines some of the considerations in order to assess and the ensure that the host and module will integrate.
How Does the FMC (FPGA Mezzanine Card) Standard Measure up Against the PMC/XMC Format White Paper
Interest in reconfigurable embedded computing in the defense and aerospace market has grown significantly as new generations of FPGAs present developers with a level of processing performance and potential I/O bandwidth that cannot easily be matched by conventional CPU configurations.